|
||||
News and Information about the Test of Electronics in Research & Design, Production, Maintenance, and Installation. | ||||
Main MenuNewsletterNews AreaInfo AreaWeblinksProduct Focus |
Readers Top 5 News of last 30 days
News - Board and System Test
SiliconAid Solutions partners with Ridgetop Group on IEEE P1687 and IEEE 1149.1-2013 Standards28 October 2014 - SiliconAid Solutions and Ridgetop Group announced they have continued and expanded their partnership to enable support for the evolving industrial testability standards. Together they have developed a system to embed Ridgetop Group’s SJ BIST board-level interconnection reliability monitor leveraging IEEE P1687 and IEEE 1149.1-2013 for intellectual property (IP). SJ BIST is a patented test IP product that detects interconnect faults between electronic devices, such as between integrated circuits (ICs) (including field programmable gate arrays [FPGAs] and systems-on-chip [SOCs]) and printed circuit boards (PCBs). Ridgetop and SiliconAid applied SiliconAid’s IEEE 1149.1-2013 and P1687 tool flows to develop compliant access to SJ BIST IP. Ridgetop continues to be a partner/customer to test and verify the SiliconAid IEEE 1149.1-2013 and P1687 flows. These adjusted implementations leverage enhanced automation, reuse, and debug capabilities of embedded chip instruments. In the past, a significant manual effort has been required to verify that embedded instruments were integrated and verified correctly in the customer design. Procedural Description Language (PDL) test pattern generation also had to be handled by the IP integrator. Using SiliconAid’s new flow, a custom testbench can be generated automatically for every design in which the IP is used. Chip-level automated test equipment (ATE) patterns can also be generated automatically. According to Andrew Levy, Ridgetop’s VP of Business Development, “SJ BIST offers a solution for detecting troublesome intermittencies. We have worked with SiliconAid to take Ridgetop’s SJ BIST Test IP Core through their P1687 IJTAG and boundary scan flows. Now that we have developed and demonstrated the ability to convert legacy patterns to PDL patterns that can be applied with these interface, our customers will enjoy even faster and more flexible deployment of SJ BIST to meet their needs for highly reliable boards and systems.” Jim Johnson, SiliconAid President and CTO, added, “We believe all IP providers will soon be delivering with support for both P1687 and 1149.1-2013 to enable IP reuse. The Plug and Play approach used by these new standards is a perfect fit for an IP provider like Ridgetop to improve quality and help the chip integrators. Utilizing these new standards will reduce the cost of integration, verification, and test pattern generation for the SOC companies using the IP. We support both of these two new standards and have a robust suite of tools to meet your needs for IP developers, SOC integrators, verification, manufacturing test, debug, and more.” Related Articles: |
Upcoming Events More events...
Tag CloudOscilloscope
JTAG
Boundary Scan
Goepel
PXI
Rohde & Schwarz
Tektronix
Keysight
AOI
Anritsu
National Instruments
Inspection
Teledyne LeCroy
Aeroflex
LTE
Yokogawa
AXI
Spectrum Analyzer
Keithley
In-Circuit-Test
Signal Analyzer
Automotive
EMC-Test
Signal Generator
Advantest
Multitest
B&K Precision
Corelis
Power Supply
SPI
Flying Prober
Teseq
Cognex
Switching
Teradyne
Viscom
Pickering
Fluke
GAO Tek
PCIe
|
||
© All about Test 2018 |