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Corelis adds advanced Triggering to I2C Bus Analyzers

02 December 2013 – Corelis has released a new version of its I2C Exerciser software, Version 1.24. The software enhances the triggering capability of Corelis’ powerful BusPro-I and CAS-1000-I2C/E bus analyzer products. The I2C Exerciser software allows users to generate I2C traffic, non-intrusively monitor and record all I2C bus traffic, and display real-time data in both state and waveform timing windows—all concurrently using a single instrument.

The advanced trigger enables users to pinpoint complex sequences, and the I2C Exerciser’s virtually limitless trace buffer means data can be continuously collected and analyzed over days, weeks, or even months until the trigger conditions are met. Additional software capabilities include master and slave emulation, a scripting language to control test sequences, and I2C signal parametric measurements.

“The advanced trigger functionality adds immense value to the already feature-rich CAS-1000-I2C/E and BusPro-I bus analyzers,” states Ryan Jones, Senior Technical Marketing Engineer at Corelis. “Logical, state-based trigger systems this advanced are usually reserved for very high-end test equipment. We are offering this capability to new and existing Corelis bus analyzer owners at no additional charge.”

The new software upgrade is available free to registered owners of the Corelis BusPro-I and CAS-1000-I2C/E products. A trial version of the software is also available to new users by registering on the Corelis website.

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