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Boundary Scan Solution for Teradyne Board Tester

Teradyne-TestStation30 January 2014 - GOEPEL electronic and Teradyne developed an extended Boundary Scan option particularly for production In-Circuit Test/Functional Board Test of PCBs and the modular functional testers on VXI and PXI Express basis. The solution is based on a pure software integration of the Boundary Scan platform SYSTEM as so called softpod, applying the tester’s native I/O instrumentation as JTAG hardware. Consequently, users benefit in several respects from a unified test setup, higher test coverage and reusability of Boundary Scan procedures throughout the entire product life cycle.  

“Due to the long-term excellent relationship with Teradyne we have been supporting all systems of the TestStation In-Circuit tester series by powerful Boundary Scan integration packages for more than a decade. Therefore, an extension in cooperation to the modular Large Scale Testers is a logical step”, says Alexander Beck, Manager System Integration in GOEPEL electronic’s JTAG/Boundary Scan Division. “The VXI and PXI Express platforms’ modular architecture and Teradyne’s high-speed subsystem provide a superb flexibility to cover different applications. The new Boundary Scan integration offers even more opportunities, in particular for assemblies with reduced test access.”

“The SYSTEM CASCON integration within the frame of our innovative softpod interface enables us to exploit the synergies from structural Boundary Scan test, in-circuit and functional test strategies to an even larger audience”, explains John Arena, Director of Marketing with Teradyne. “At the same time, we consistently continue our philosophy of open Boundary Scan integration for all leading suppliers.”

The standard hardware link was complemented by a softpod version and docked to the special Teradyne Boundary Scan Run Time Library (TERBSR) for coupling the SYSTEM CASCON Run Time version. Via this Application Programming Interface (API), SYSTEM CASCON can access the Teradyne ATE high-speed channels, utilizing them as JTAG control signals for the UUT’s Test Access Port (TAP). Based on this chaining, Boundary Scan procedures can be directly taken over from preceded product life stages such as design validation or prototype test. The Teradyne test system controls the entire process. The complete and seamless integration is based on the standard CASCON Application Programming Interfaces (CAPI).


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