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Processor Emulation in Combination with Boundary Scan

Goepel-TIC12210 March 2014 – GOEPEL electronic developed another TAP Interface Card (TIC), named TIC122, for the modular Boundary Scan hardware platform SCANFLEX. The new TIC Module features a programmable multi-bus interface enabling nearly unlimited compatibility to a multitude of standardized and proprietary microprocessor debug protocols and – simultaneously – supporting all Boundary Scan standards.

“The combination of Boundary Scan and Processor Emulation Test offers a huge potential for intensive prototype validation, but also for higher test coverage in production. With our new TAP Interface Card we ensure the users the required efficiency based on a universal frontend”, explains Bettina Richter, Marketing Manager at GÖPEL electronic. “For the first time, TIC122 also offers upgrade functions for already installed systems to upgrade further debug protocols or new Boundary Scan Standards upon request at any time. This sustainably ensures investment and makes this solution even more attractive”.

TIC122 is an active test head specifically developed for in-fixture utilization with the adaptive streaming technology VarioTAP.

In addition to bus signals, it provides a number of emulation signals that can flexibly be integrated in a streaming procedure. Thus, TIC022 is able to cover various protocols and target interfaces, including standards such as IEEE1149.1, IEEE1149.6, IEEE1149.7, IEEE1149.8.1, IEEE1532 and IEEE-ISTO 5001 as well as numerous non-JTAG interfaces like BDM (Background Debug Mode) from Freescale, SBW (Spy-Bi-Wire) from Texas Instruments, SWD (Serial Wire Debug) from ARM and many more.

Beyond that, TIC122 offers special properties to support Intel Core processors of 4th generation (code name Haswell), as well as Intel ATOMTM micro processors and the Intel Quark SoC family.

The test head’s differential coupling with a SCANFLEX basic system ensures reliable high-speed data transfers even in noisy environments. At the same time, TIC 122 can easily and reliably be connected over distances of up to 4m. There is no performance loss as runtime delays in the cables and units under test (UUT) can be individually compensated per TAP through the ADYCS technique.

This new member of the family of TIC modules can be re-configured in the field and is backward compatible with existing TAP Interface Cards, allowing existing applications to be easily upgraded, protecting prior investments. Automatically recognized by the AutoDetect feature, TIC122 is supported in the industry leading JTAG/Boundary Scan software SYSTEM CASCON. Besides the standard model, the TIC122 is also available in an extended version with feature isolating relays for all I/O signals, to be used for production test applications.

Through OEM cooperation with all leading vendors of In-Circuit testers (ICT), Manufacturing Defect Analysers (MDA), Flying Probers (FPT) and Functional Test systems (FCT), the new solution is available immediately for the respective integration applications.

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